• DocumentCode
    2097141
  • Title

    Table-lookup methods for improved performance-driven routing

  • Author

    Lillis, John ; Buch, Premal

  • Author_Institution
    Dept. of Electr. Eng. & Comput. Sci., Chicago Univ., IL, USA
  • fYear
    1998
  • fDate
    19-19 June 1998
  • Firstpage
    368
  • Lastpage
    373
  • Abstract
    The inaccuracy of Elmore delay for interconnect delay estimation is well-documented. However it remains a popular delay measure to drive performance optimization procedures such as wire-sizing and topology construction. This paper studies the merits of incorporating "better-than-Elmore" delay measures into the optimization process. The proposed delay metrics use a table-lookup method to incorporate better load modeling and approximate the effect of signal slew. We demonstrate that the proposed metrics exhibit a much narrower error distribution than Elmore delay, eliminating Elmore\´s frequent gross delay over-estimation. Finally we show the improvement in solution quality which can be had by incorporating the new metrics into a timing driven topology construction algorithm.
  • Keywords
    circuit layout CAD; circuit optimisation; integrated circuit interconnections; table lookup; Elmore delay; delay metrics; error distribution; interconnect delay estimation; performance optimization; table-lookup; table-lookup method; Algorithm design and analysis; Delay estimation; Design optimization; Load modeling; Permission; Routing; Taxonomy; Timing; Topology; Wire;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 1998. Proceedings
  • Conference_Location
    San Francisco, CA, USA
  • Print_ISBN
    0-89791-964-5
  • Type

    conf

  • Filename
    724499