DocumentCode :
2097814
Title :
Real Time FFT Processor Implementation
Author :
Minallah, Mian Sijjad ; Raja, Gulistan
Author_Institution :
Dept. of Electr. Eng., Univ. of Eng. & Technol., Taxila
fYear :
2006
fDate :
13-14 Nov. 2006
Firstpage :
192
Lastpage :
195
Abstract :
This paper describes the implementation of a 64 point FFT processor in VHDL. The implemented architecture (E. Cetin, et al., 1997) is well suited for real-time spectrum analysis in instrumentation and measurement applications. It uses a single butterfly processor instead of a column of butterfly processors. The butterfly consists of one multiplier and two adders. The paper describes the VHDL implementation of various units of this processor
Keywords :
fast Fourier transforms; field programmable gate arrays; hardware description languages; hypercube networks; FFT processor; FPGA; VHDL; single butterfly processor; spectrum analysis; Adders; Circuit testing; Computational modeling; Computer architecture; Discrete Fourier transforms; Hardware; Instrumentation and measurement; Process control; Read only memory; Read-write memory;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Emerging Technologies, 2006. ICET '06. International Conference on
Conference_Location :
Peshawar
Print_ISBN :
1-4244-0502-5
Electronic_ISBN :
1-4244-0503-3
Type :
conf
DOI :
10.1109/ICET.2006.335959
Filename :
4136927
Link To Document :
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