DocumentCode :
2100313
Title :
The Vortex: A Superscalar Asynchronous Processor
Author :
Lines, Andrew
Author_Institution :
Fulcrum Microsyst., Calabasas, CA
fYear :
2007
fDate :
12-14 March 2007
Firstpage :
39
Lastpage :
48
Abstract :
The "Vortex" processor is a general purpose CPU with a novel architecture and instruction set. The primary feature of the Vortex architecture is many parallel function units which communicate through a central crossbar, instead of a traditional register file. Instructions are fetched in parallel by cache lines, as in a VLIW processor, but any data or structural dependencies are resolved deterministically by the hardware, as in a superscalar processor. The prototype Vortex CPU supports a 32-bit integer datapath and executes up to 9 instructions per cycle. It uses the "integrated pipelining" asynchronous design style, was fabricated in 2001 in TSMC\´s 0.15 mum G process, and runs at a typical frequency of 475MHz. Although the Vortex CPU itself has not been commercialized, many of its component circuits have been used in the products of Fulcrum Microsystems.
Keywords :
cache storage; instruction sets; microprocessor chips; parallel architectures; pipeline processing; Fulcrum Microsystems; TSMC process; VLIW processor; Vortex architecture; central crossbar; general purpose CPU; instruction set; integrated pipelining asynchronous design; parallel function units; superscalar asynchronous processor; Central Processing Unit; Circuit simulation; Ethernet networks; Frequency; Hardware; Out of order; Pipeline processing; Prototypes; Registers; VLIW;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Asynchronous Circuits and Systems, 2007. ASYNC 2007. 13th IEEE International Symposium on
Conference_Location :
Berkeley, CA
ISSN :
1522-8681
Print_ISBN :
0-7695-2771-X
Type :
conf
DOI :
10.1109/ASYNC.2007.28
Filename :
4137031
Link To Document :
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