Automatic Synthesis of Multiprocessor Systems from Parallel Programs under Preemptive Scheduling

Author

Ishebabi, Harold ; Mahr, Philipp ; Bobda, Christophe

Author_Institution

Dept. of Comput. Sci., Univ. of Potsdam, Potsdam

fYear

2008

fDate

3-5 Dec. 2008

Firstpage

19

Lastpage

24

Abstract

A design approach for multiprocessor systems on FPGAs is presented. The goal is to customize such systems for target parallel programs by simultaneously solving the problems of task mapping and high level synthesis. By considering the effect of fixed-priority preemptive scheduling when several tasks share a processor resource, a broad spectrum of embedded application requirements is covered. Experimental results, in which architectures for IEEE 802.11g and WCDMA baseband signal processing are synthesized, demonstrate the feasibility.

Keywords

field programmable gate arrays; multiprocessing systems; parallel programming; scheduling; FPGA; IEEE 802.11g; WCDMA baseband signal processing; automatic synthesis; field programmable gate arrays; fixed-priority preemptive scheduling; multiprocessor systems; parallel programs; Computer science; Concurrent computing; Field programmable gate arrays; Mathematical model; Multiaccess communication; Multiprocessing systems; Processor scheduling; Signal synthesis; Simultaneous localization and mapping; Space exploration; Multiprocessor Systems; Parallel Computing; Reconfigurable Computing;

fLanguage

English

Publisher

ieee

Conference_Titel

Reconfigurable Computing and FPGAs, 2008. ReConFig '08. International Conference on

Conference_Location

Cancun

Print_ISBN

978-1-4244-3748-1

Electronic_ISBN

978-0-7695-3474-9

Type

conf

DOI

10.1109/ReConFig.2008.8

Filename

4731764