Architectural Model and Resource Estimation for Distributed Hardware Implementation of Discrete Signal Transforms

A well defined target architecture is essential to the success of high-level partitioning and synthesis tools. We present DINAMO, an architectural model tailored for distributed implementations of discrete signal transforms (DSTs) such as FFTs and discrete cosine transforms. DINAMO is a modular generalization of horizontal/vertically folded computational structures, common in fast versions of DSTs. The architecturepsilas systematic definition of functional, communication and control structures, allowed the development of a simplified, equation-based model for obtaining accurate FPGA resource utilization estimates. Resource estimates were obtained with an absolute error of average 7.87% when compared to FPGA synthesis results.