DocumentCode :
2101060
Title :
On Schmitt trigger and other inverters
Author :
Ibrahim, Wubshet ; Beiu, Valeriu ; Tache, Mihai ; Kharbash, Fekri
Author_Institution :
Coll. of Inf. Technol., United Arab Emirates Univ., Al Ain, United Arab Emirates
fYear :
2013
fDate :
8-11 Dec. 2013
Firstpage :
29
Lastpage :
32
Abstract :
This paper compares classical CMOS versus Schmitt trigger (ST) inverters (INVs), sized both conventionally as well as unconventionally. The reason is that ST INVs are using positive feedback (which leads to hysteresis) and are expected to exhibit much better static noise margins (SNMs) than classical CMOS INVs. That is why ST INVs are more reliable. Lately, quite a few papers have been looking at using ST INVs for implementing SRAMs focusing mainly on the ultra-low voltage/power application range. Here we are going to look at SNM, delay, power and power-delay-product over the whole voltage range for exploring the potential advantages ST could offer in advanced CMOS technology nodes, and better identify their application range.
Keywords :
CMOS digital integrated circuits; invertors; low-power electronics; trigger circuits; CMOS INV; SNM; SRAM; ST INV; Schmitt trigger inverters; advanced CMOS technology nodes; complementary metal-oxide-semiconductor technology; power-delay-product; static noise margins; ultra-low power application range; ultra-low voltage application range; voltage range; CMOS integrated circuits; Delays; Logic gates; Noise; Optimized production technology; Switches; Transistors; CMOS; Schmitt trigger; inverter; sizing; static noise margin (SNM);
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Circuits, and Systems (ICECS), 2013 IEEE 20th International Conference on
Conference_Location :
Abu Dhabi
Type :
conf
DOI :
10.1109/ICECS.2013.6815337
Filename :
6815337
Link To Document :
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