• DocumentCode
    2101519
  • Title

    Accelerating data centers with reconfigurable logic

  • Author

    Chiou, Derek

  • fYear
    2015
  • fDate
    27-29 July 2015
  • Firstpage
    1
  • Lastpage
    1
  • Abstract
    Data centers are a highly competitive environment that demands high performance and energy efficiency and, in many cases, low latency. Custom hardware can provide significant improvements over conventional microprocessors on those metrics. Microsoft has been investigating the use of reconfigurable logic, in the form of field programmable gate arrays, to accelerate its data centers. In this talk, I will describe some of our efforts in this area.
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Application-specific Systems, Architectures and Processors (ASAP), 2015 IEEE 26th International Conference on
  • Conference_Location
    Toronto, ON, Canada
  • Type

    conf

  • DOI
    10.1109/ASAP.2015.7245694
  • Filename
    7245694