Title :
System-chip test strategies
Author_Institution :
LogicVision Inc., San Jose, CA, USA
Abstract :
A major challenge in realizing core-based system-chips is the adoption of adequate test and diagnosis strategies. This paper focuses on the current industrial practices in test strategies for system-chips. It discusses the challenges in testing embedded cores, the testing requirements for individual cores, and their test access mechanisms. It also covers the integrated test strategies for system-chips based on reusable cores. In addition to the state-of-the-art practices in testability schemes, this paper covers the current standardization efforts for embedded core test interface mechanisms.
Keywords :
integrated circuit testing; microprocessor chips; core-based system-chips; diagnosis strategies; embedded core test interface mechanisms; embedded cores; integrated test strategies; intellectual property test; reusable cores; system-chip test strategies; system-on-chip test; test access mechanisms; Costs; Hardware; Intellectual property; Logic testing; Manufacturing; Permission; Random access memory; Standardization; System testing; System-on-a-chip;
Conference_Titel :
Design Automation Conference, 1998. Proceedings
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-89791-964-5
