DocumentCode
2102164
Title
Review of synchronous buck converter design optimization
Author
El-Zanaty, Mohamed ; Orabi, Mohamed ; El-Sadek, M.Z.
Author_Institution
APEARC, South Valley Univ., Aswan
fYear
2008
fDate
12-15 March 2008
Firstpage
588
Lastpage
592
Abstract
Nowadays, the main important issue for power supplies designers is to feed last generation of microprocessors and DSPs, since they require high current slew rates on accompain with low output voltage. This paper introduces the design steps for a buck converter used in that kind of applications. Also, the advantage of applying high switching frequency has been made clear. Experimental results have been obtained to verify simulation and analysis.
Keywords
optimisation; switching convertors; DSP; design steps; low output voltage; microprocessors; switching frequency; synchronous buck converter design optimization; Analytical models; Buck converters; Design optimization; Digital signal processing; Feeds; Low voltage; Microprocessors; Power generation; Power supplies; Switching frequency;
fLanguage
English
Publisher
ieee
Conference_Titel
Power System Conference, 2008. MEPCON 2008. 12th International Middle-East
Conference_Location
Aswan
Print_ISBN
978-1-4244-1933-3
Electronic_ISBN
978-1-4244-1934-0
Type
conf
DOI
10.1109/MEPCON.2008.4562398
Filename
4562398
Link To Document