DocumentCode
2102903
Title
A new two-step recess technology using SiNx passivation and Pt-buried gate process and its application to 0.15 μm Al0.6InAs/In0.65GaAs HEMTs
Author
Kim, Dae-Hyun ; Lee, Kang-Min ; Lee, Jae.-Hak. ; Seo, Kwang-Seok
Author_Institution
Sch. of EECS, Seoul Nat. Univ., South Korea
fYear
2004
fDate
21-23 June 2004
Firstpage
69
Abstract
A new two-step recess (TSR) technology was successfully demonstrated using SiNx passivation and Pt-buried gate process. Applying the developed two-step recess (TSR) process to the fabrication of 0.15 μm Al0.6InAs/In0.65GaAs HEMTs, remarkable improvements could be obtained such as the suppression of the kink effect, and the increase of Gm,max, fT and fmax. Since the side-recessed region was fully passivated by SiNx dielectric layer, this TSR technology is also to offer additional advantage of good reliability.
Keywords
III-V semiconductors; aluminium compounds; buried layers; gallium arsenide; high electron mobility transistors; indium compounds; passivation; platinum; semiconductor device measurement; semiconductor device reliability; silicon compounds; 0.15 micron; Al0.6InAs-In0.65GaAs; Al0.6InAs/In0.65GaAs HEMT; Pt-buried gate process; SiNx dielectric layer; SiNx passivation; TSR technology; fully passivated side-recessed region; kink effect suppression; reliability; two-step recess technology; Annealing; Gallium arsenide; HEMTs; Intrusion detection; MODFETs; Passivation; Silicon compounds;
fLanguage
English
Publisher
ieee
Conference_Titel
Device Research Conference, 2004. 62nd DRC. Conference Digest [Includes 'Late News Papers' volume]
ISSN
1548-3770
Print_ISBN
0-7803-8284-6
Type
conf
DOI
10.1109/DRC.2004.1367787
Filename
1367787
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