DocumentCode
2103434
Title
Schottky-barrier-height engineering for strained-Si MOSFETs
Author
Ikeda, Keiji ; Yamashita, Yoshimi ; Endoh, Akira ; Hikosaka, Kohki ; Mimura, Takashi
Author_Institution
Fujitsu Labs. Ltd., Kanagawa, Japan
fYear
2004
fDate
21-23 June 2004
Firstpage
111
Abstract
The Schottky source/drain MOSFET (SSD-MOSFET) is an attractive design for ballistic MOSFETs because it has the potential to allow high-energy carrier injection from a metal source to an intrinsic channel (J.R. Tucker et al, Appl. Phys. Lett., vol. 65, p. 618, 1994; J. Kedzierski et al, IEDM Tech. Dig., p. 57, 2000). However, achieving high-drive current is difficult because of the relatively high potential barrier (Schottky barrier) at the source. To overcome this problem, we have proposed the Schottky-barrier-height (SBH) engineering through semiconductor bandgap modulation (K. Ikeda et al, 60th DRC late news paper; K. Ikeda et al, IEEE Electron Device Lett., vol. 23, p. 670, 2002). For effective SBH engineering with high controllability, stress control to control the bandgap is key issue. However, we know of no published reports on strain distributions in a strained-Si channel or at silicide/strained-Si interfaces. In this paper, we demonstrate strain-distribution analysis using STEM micrographs of a strained-Si channel SSD-MOSFET combined with fast-Fourier transform mapping (FFTM) (T. Ide et al, Jpn, J. Appl. Phys., vol. 37, p. L1546, 1998).
Keywords
MOSFET; Schottky barriers; electric current; electrodes; energy gap; fast Fourier transforms; scanning-transmission electron microscopy; semiconductor device measurement; stress analysis; SBH engineering controllability; SSD-MOSFET; STEM micrographs; Schottky source/drain MOSFET; Schottky-barrier-height engineering; Si; ballistic MOSFET; bandgap control; fast-Fourier transform mapping; high-drive current; high-energy carrier injection; intrinsic channel; metal source; semiconductor bandgap modulation; silicide/strained-Si interfaces; strain-distribution analysis; strained-Si MOSFET; strained-Si channel SSD-MOSFET; stress control; Buffer layers; Capacitive sensors; Data analysis; Germanium silicon alloys; Image analysis; MOSFETs; Photonic band gap; Silicon germanium; Stress control; Tensile stress;
fLanguage
English
Publisher
ieee
Conference_Titel
Device Research Conference, 2004. 62nd DRC. Conference Digest [Includes 'Late News Papers' volume]
ISSN
1548-3770
Print_ISBN
0-7803-8284-6
Type
conf
DOI
10.1109/DRC.2004.1367808
Filename
1367808
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