DocumentCode :
2104702
Title :
Design of a low-power asynchronous elliptic curve cryptography coprocessor
Author :
Zeidler, Steffen ; Goderbauer, Michael ; Krstic, Miroslav
Author_Institution :
IHP, Frankfurt (Oder), Germany
fYear :
2013
fDate :
8-11 Dec. 2013
Firstpage :
569
Lastpage :
572
Abstract :
The current evolution of mobile devices and networked pervasive computer systems, such as wireless sensor networks, demand more and more functionality while consuming a minimum amount of energy. Security is one important need within such networked systems. With respect to this, the asynchronous design style is an accepted way of hardening crypto-cores against side-channel attacks. In this paper, we show a case study of designing a low-power asynchronous processor for elliptic-curve-cryptography. Therefore, we provide the theoretical base of this crypto-technique and a description about the applied designflow. For the evaluation, a layout has been created and compared with a synchronous implementation. The results show that even for a larger asynchronous implementation the power consumption is only one third of the synchronous one.
Keywords :
asynchronous circuits; coprocessors; electronic design automation; low-power electronics; public key cryptography; asynchronous design style; cryptocores hardening; cryptotechnique; elliptic-curve-cryptography coprocessor; low-power asynchronous processor; mobile devices; networked pervasive computer systems; power consumption; security; side-channel attacks; Asynchronous circuits; Elliptic curve cryptography; Polynomials; Power demand; Registers; Runtime; Asynchronous design; Balsa; elliptic-curve-cryptography; low-power;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Circuits, and Systems (ICECS), 2013 IEEE 20th International Conference on
Conference_Location :
Abu Dhabi
Type :
conf
DOI :
10.1109/ICECS.2013.6815478
Filename :
6815478
Link To Document :
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