An energy-efficient hardware design for lossless reference frame compression in video coders

In current video coders many modules that compose the encoder need to write and to read a large amount of data from external memory. It requires a large memory bandwidth, with significant impact on energy consumption. In this context, this paper presents the hardware architectures of the Reference Frame Context Adaptive Variable-Length Compressor with 4 coding tables (RFCAVLC), which is a standard-free lossless solution for reducing external memory bandwidth. RFCAVLC reaches an average compression rate higher than 24% for the evaluated video sequences. The RFCAVLC hardware (Coder and Decoder) was described in VHDL and synthesized targeting ASIC for 45nm, 65nm, and 90nm TSMC standard cell libraries. The results show that with 45nm, 65nm, and 90nm, the RFCAVLC is able to process up to 83, 69, and 42 QFHD frames per second, respectively. To attend real-time processing for QFHD@30 frames per second our design consumes 23.4 pJ/sample for 90 nm, 15.6 pJ/sample for 65 nm, and 7.1 pJ/sample for 45 nm.