Minimum neutral clamp capacitor design considering voltage saturation for a three-level inverter

Author

Itoh, Jun-Ichi ; Tanaka, Takaaki

Author_Institution

Nagaoka Univ. of Technol., Nagaoka, Japan

fYear

2011

fDate

May 30 2011-June 3 2011

Firstpage

1411

Lastpage

1418

Abstract

A neutral point clamped inverter has a voltage fluctuation problem at the neutral point capacitor. This paper discusses the minimum value of the neutral point capacitor considering the voltage command saturation with the voltage fluctuation suppression control method. This paper clearly demonstrates the stable relationships among the input voltage, the output voltage and the capacitance value. In addition, the minimization design procedure of the capacitance value basis on this analysis is demonstrated. The validity of the design method is confirmed by experimental results.

Keywords

fluctuations; invertors; power capacitors; voltage control; capacitance value; neutral clamp capacitor design; three level inverter; voltage fluctuation paper suppression; voltage fluctuation suppression control; voltage saturation; Capacitance; Fluctuations; Inverters; Modulation; Reactive power; Voltage control; Voltage fluctuations; Minimum capacitance design; Neutral point voltage fluctuation; Three level inverter; Vector control;

fLanguage

English

Publisher

ieee

Conference_Titel

Power Electronics and ECCE Asia (ICPE & ECCE), 2011 IEEE 8th International Conference on

Conference_Location

Jeju

ISSN

2150-6078

Print_ISBN

978-1-61284-958-4

Electronic_ISBN

2150-6078

Type

conf

DOI

10.1109/ICPE.2011.5944434

Filename

5944434