DocumentCode :
2105493
Title :
Performability measurement of coding algorithms for network on chip
Author :
Salem, Ayman A. ; El Ghany, Mohamed A. Abd ; Hofmann, Klaus
Author_Institution :
Eng. Dept., German Univ. in Cairo, Cairo, Egypt
fYear :
2013
fDate :
8-11 Dec. 2013
Firstpage :
691
Lastpage :
694
Abstract :
Bose-Chaudhuri-Hocquenghem (BCH) coding based on chip communication network is proposed to achieve optimal Energy-Performability trade-off. The proposed encoding and decoding scheme is applied to Butterfly-fat-tree (BFT) architecture. The proposed design improves Perform-ability range in comparison with conventional schemes while saving energy by 5%. BCH achieves high perform-ability (0.9) at high noise effect (σN =0.135V). At short wire lengths (0.05mm), BCH saves energy 5% while increasing perform-ability (0.9) and reliability.
Keywords :
BCH codes; decoding; integrated circuit reliability; network-on-chip; BCH coding based on chip communication network; BFT architecture; Bose-Chaudhuri-Hocquenghem coding; Butterfly-fat-tree architecture; decoding scheme; encoding scheme; network on chip; optimal energy-performability trade-off; perform-ability range; performability measurement; size 0.05 mm; Decoding; Encoding; Error correction; Error correction codes; Logic gates; Reliability; Wires;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Circuits, and Systems (ICECS), 2013 IEEE 20th International Conference on
Conference_Location :
Abu Dhabi
Type :
conf
DOI :
10.1109/ICECS.2013.6815508
Filename :
6815508
Link To Document :
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