DocumentCode
2106673
Title
A 512kb cross-point cell MRAM
Author
Sakimura, N. ; Sugibayashi, T. ; Honda, T. ; Miura, S. ; Numata, H. ; Hada, H. ; Tahara, S.
Author_Institution
Silicon Syst. Res. Labs., NEC, Sagamihara, Japan
fYear
2003
fDate
13-13 Feb. 2003
Firstpage
278
Abstract
A 512kb MRAM comprising cross-point cells, magnetic tunnel junctions, bit lines and word lines is designed using a 0.25/spl mu/m CMOS and a 0.6/spl mu/m MRAM process. The design provides a new sensing method without a large area overhead despite a low current cross-point signal. The MRAM operates with read access time of 1.0/spl mu/s at 2.5V.
Keywords
CMOS memory circuits; magnetic storage; magnetic tunnelling; random-access storage; 0.25 micron; 0.6 micron; 2.5 V; 512 kbit; CMOS MRAM; bit line; cross-point cell; magnetic tunnel junction; nonvolatile memory; sensing method; word line; Capacitors; Circuits; Costs; Decoding; Electric resistance; Magnetic separation; Magnetic tunneling; Polarization; Switches; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. 2003 IEEE International
Conference_Location
San Francisco, CA, USA
ISSN
0193-6530
Print_ISBN
0-7803-7707-9
Type
conf
DOI
10.1109/ISSCC.2003.1234300
Filename
1234300
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