ZFTL: A Zone-based Flash Translation Layer with a two-tier selective caching mechanism

In this paper, we propose a Zone-based Flash Translation Layer (ZFTL) for NAND flash-based storage systems. ZFTL is a novel page-level flash translation layer to divide a whole flash into several Zones so that it can reduce the size of SRAM by caching address mapping information of on-demand Zone. Moreover, we propose a two-tier selective caching mechanism to jointly exploit temporal locality and spatial locality of workloads. By selectively caching request mapping entry with the two-tier architecture, ZFTL utilizes the limited SRAM more efficiently so as to improve cache hit ratio and reduce system respond time. Our experimental evaluation with various realistic workloads shows that ZFTL outperforms state-of-the-art FTL schemes. In particular, ZFTL reduces address translation overhead by up to 85% and improves system response time by up to 60% compared to DFTL, though it uses only 5% of SRAM.