Title :
40Gb/s 2:1 multiplexer and 1:2 demultiplexer in 120nm CMOS
Author :
Kehrer, D. ; Wohlmuth, H.-D. ; Knapp, H. ; Wurzer, M. ; Scholtz, A.L.
Author_Institution :
Corporate Res., Infineon Technol. AG, Munich, Germany
Abstract :
A 40Gb/s 2:1 multiplexer in 120nm 1.2V CMOS uses inductive peaking and output series inductor. A companion 1:2 demultiplexer is also described.
Keywords :
CMOS logic circuits; demultiplexing equipment; multiplexing equipment; 1.2 V; 120 nm; 1:2 demultiplexer; 2:1 multiplexer; 40 Gbit/s; CMOS; inductive peaking; output series inductor; CMOS logic circuits; CMOS technology; Clocks; Flip-flops; Frequency; Inductors; Latches; MOSFETs; Multiplexing; Voltage;
Conference_Titel :
Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. 2003 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-7707-9
DOI :
10.1109/ISSCC.2003.1234328
