DocumentCode
2107420
Title
A multi standard single-chip transceiver covering 5.15 to 5.85GHz
Author
Schwanenberger, T. ; Ipek, M. ; Roth, S. ; Schemmann, H.
Author_Institution
ICDH, Thomson, Villingen, Germany
fYear
2003
fDate
13-13 Feb. 2003
Firstpage
350
Abstract
This transceiver achieves a transmit 1dB output compression point of +15dBm, and the overall receiver noise figure is 5dB. A power gain range of >45dB/65dB for transmit/receive and a PLL synthesizer frequency range of 4.9 to 5.85GHz with -79dBc/Hz phase noise at 10kHz offset have been measured. The IC is realized in 0.5/spl mu/m SiGe BICMOS technology and occupies 17mm/sup 2/.
Keywords
BiCMOS integrated circuits; Ge-Si alloys; MMIC; frequency synthesizers; integrated circuit noise; phase locked loops; phase noise; transceivers; 0.5 micron; 4.9 to 5.85 GHz; 5 dB; 5.15 to 5.85 GHz; BiCMOS technology; PLL synthesizer frequency range; SiGe; multi standard single-chip transceiver; output compression point; overall receiver noise figure; phase noise; power gain range; BiCMOS integrated circuits; Frequency measurement; Frequency synthesizers; Gain measurement; Noise figure; Noise measurement; Phase locked loops; Phase noise; Power measurement; Transceivers;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. 2003 IEEE International
Conference_Location
San Francisco, CA, USA
ISSN
0193-6530
Print_ISBN
0-7803-7707-9
Type
conf
DOI
10.1109/ISSCC.2003.1234330
Filename
1234330
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