DocumentCode
2107588
Title
An integrated 5.2GHz CMOS T/R switch with LC-tuned substrate bias
Author
Talwalkar, N. ; Yue, C.P. ; Wong, S.S.
Author_Institution
Stanford Univ., CA, USA
fYear
2003
fDate
13-13 Feb. 2003
Firstpage
362
Abstract
A 0.56mm/sup 2/ T/R switch in 0.18/spl mu/m CMOS achieves 1.5dB insertion loss, 28dBm P/sub 1cB/, 30dB isolation and 4kV HBM ESD rating. The switch uses an on-chip LC-tuned substrate biasing technique to enhance linearity and allows the LNA and PA to be matched independently. Power dissipation is 30/spl mu/W.
Keywords
CMOS integrated circuits; MMIC amplifiers; field effect MMIC; low-power electronics; transceivers; 0.18 micron; 1.5 dB; 30 muW; 4 kV; 5.2 GHz; CMOS; CMOS RF transceivers; HBM ESD rating; LC-tuned substrate bias; LNA; PA; T/R switch; linearity; low-power wireless systems; CMOS process; Communication switching; Electrostatic discharge; Impedance; Insertion loss; Receiving antennas; Resistors; Switches; Transmitting antennas; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. 2003 IEEE International
Conference_Location
San Francisco, CA, USA
ISSN
0193-6530
Print_ISBN
0-7803-7707-9
Type
conf
DOI
10.1109/ISSCC.2003.1234336
Filename
1234336
Link To Document