Author :
Kakimoto, S. ; Okuno, T. ; Iwase, Y. ; Yaoi, Y. ; Yoshioka, F. ; Kimoto, K. ; Nakano, M. ; Kawashima, K. ; Morishita, S. ; Sugimoto, K. ; Shiomi, T. ; Okumime, T. ; Kataoka, K. ; Shibata, A. ; Toyoyama, S. ; Satoh, Y. ; Fujimoto, K. ; Tatsumi, K. ; Kotaki
Keywords :
CMOS integrated circuits; MOSFET; adaptive control; integrated circuit design; integrated circuit testing; low-power electronics; matched filters; power supply circuits; voltage control; 0.5 V; 520k transistor COMA matched filter operation; LSI operation; SAPS architecture; bulk dynamic threshold MOSFET; low power SoC; self-adaptive power supply; self-corrective device; threshold voltage dispersion; worst case conditions; Adaptive control; Delay effects; Large scale integration; Leakage current; MOSFET circuits; Power MOSFET; Power dissipation; Power supplies; Threshold voltage; Voltage control;