FPGA-based modulator design for five-level inverter control with optimized pulse patterns

This paper describes a modulator design for a voltage-source inverter using optimized pulse patterns, which is implemented in a programmable logic device (PLD), similar to field programmable gate arrays (FPGA). The modulator was developed using a hardware-description language and is realized in a PLD, that is interfaced via PC bus to a host computer. The inverter consists of three identical phase modules, where each module is built as a full-bridge-circuit in a three-level neutral-point-clamped topology. So, each phase-module can switch between five different voltage levels. This inverter is used to demonstrate control methods for the balancing of single-phase railway loads fed from three-phase grids.