Design of online aging sensor architecture for mixed-signal intergrated circuit

Electronic systems such as used in automotive or industrial applications require highly reliable micro-electronic systems, especially ASICs. This paper presents a novel aging sensor architecture which monitors the degradation of the digital and analog circuit in operation so as to achieve triggering of a failure warning a certain time distance ahead of the wearout region of an IC. The proposed programmable guardband interval in monitor provides various prediction levels of aging time step and also more resilient detection on temperature, supply voltage and process variations. Various simulation results are presented using a 0.15μm CMOS standard process and show that the new on-line failure prediction circuit is very useful for safety or mission critical applications.