A Non-Uniform Grid Based Ground Plane Model for High Performance Nodes: The Impact of Heterogeneous Cores on Ground Voltage Gradient

With shift towards heterogeneous core architectures imminent, the uniform grid based ground plane model that is currently employed for chip-multiprocessors will no longer suffice. It is practically impossible to achieve absolute zero potential at all grid nodes of the uniform ground plane model with advent of heterogeneous cores. Differential injection of current into the ground plane by different heterogeneous core partitions results in voltage gradients across the ground plane, which is detrimental to the operation of the processor. The extremely stochastic spiking activity of different cores further accentuates the problem. To overcome the problem of varying voltage distribution across the ground plane, we propose a first-ever ground plane model structured as a non-uniform RLC interconnect grid. A simulated annealing optimization is employed with parameter of dasiatemperaturepsila as each node in the grid and impedance as the cost function psiladeltaepsila to arrive at the non-uniform grid structure.