• DocumentCode
    2109792
  • Title

    Military/civilian mixed-mode Global Positioning System (GPS) receiver (MMGR)

  • Author

    Peczalski, Andy ; Kriz, Jeff ; Carlson, Stephen G. ; Sampson, Steven J.

  • Author_Institution
    Honeywell Aerosp. Electron. Syst., Plymouth, MN, USA
  • Volume
    4
  • fYear
    2004
  • fDate
    13-13 March 2004
  • Firstpage
    2697
  • Abstract
    This paper describes plans and progress made on the MMGR program funded jointly by Air Force Research Laboratory (AFRL), GPS Joint Program Office (JPO) and industry that started in April 2003. The Honeywell/Rockwell Collins MMGR program starts with a minimum configuration of the GPS receiver (e.g. low end commercial GPS) and develop a new RF front-end design using mixed mode CMOS technology with lowest cost components and processes over the first year of the program. The front-end Application Specific Integrated Circuit (ASIC) design have a modular and flexible architecture based on reuseable macro-cells. This initial RF front-end design is evolved and targeted to meet specific commercial, military and space application requirements during the subsequent development iterations over the last two years of the program and beyond. Rockwell Collins demonstrates feasibility of using a digital device to create an M-code capable, high anti-jam GPS system. This shows a path to an adaptable MMGR that enables flexibility and easy upgradeability for both military and commercial GPS receivers and adheres to GPS Modernization/GPS III receiver specifications. The emphasis of the Rockwell Collins task is to improve anti-jam (AJ) and anti-interference capability of the GPS receivers through miniaturization of the anti-jamming (AJ) electronics and improvements in ultra-tight coupling (UTC) of a GPS receiver and an Inertial Measurement Unit (IMU).
  • Keywords
    CMOS integrated circuits; Global Positioning System; integrated circuit design; jamming; military communication; military equipment; mixed analogue-digital integrated circuits; radio receivers; ASIC design; Air Force Research Laboratory; GPS Joint Program Office; GPS receiver; RF front-end design; antiinterference capability; antijam GPS system; antijam capability; antijamming electronics; application specific integrated circuit design; digital device; inertial measurement unit; macrocells; military application; military-civilian mixed mode Global Positioning System receiver; mixed mode CMOS technology; space application; ultra tight coupling; Application specific integrated circuits; CMOS process; CMOS technology; Costs; Defense industry; Global Positioning System; Integrated circuit technology; Measurement units; Radio frequency; Space technology;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Aerospace Conference, 2004. Proceedings. 2004 IEEE
  • Conference_Location
    Big Sky, MT
  • ISSN
    1095-323X
  • Print_ISBN
    0-7803-8155-6
  • Type

    conf

  • DOI
    10.1109/AERO.2004.1368065
  • Filename
    1368065