Impact of technology scaling on bridging fault detections

It is well known that classical fault models (stuck-at, stuck-open, stuck-on) cover only partially the spectrum of failures in today´s integrated circuits (IC). Some realistic failures occurring in the logic circuits have to be considered at physical level and include its electrical behavior. Among these failures, gate-oxide short, floating gate and bridging fault types may produce intermediate voltages difficult to interpret at logic level. This work investigates the influence of bridging faults (BF) between two interconnection lines on logic margin and logic swing of ICs and the sensitivity of ICs realized on four different technologies (0.25 μm, 0.35 μm, 0.5 μm, 1.5 μm) to bridging faults. In this work we show that the sensitivity of ICs to BF is increased with the technology scaling. The testing methodology was based on the use of voltage, temperature and frequency as parameters, which influence the behavior of ICs with BF