Title :
A Process Variation Tolerant Self-Compensating Sense Amplifier Design
Author :
Choudhary, Aarti ; Kundu, Sandip
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Massachusetts, Amherst, MA
Abstract :
Lithography related CD variations, fluctuations in dopant density, oxide thickness and parametric variations of devices are identified as major challenges in ITRS. Due to growth in size of embedded SRAMs as well as usage of sense amplifier based signaling techniques, process variation in sense amplifiers lead to significant loss of yield. In this paper, we present a process variation tolerant self-compensating sense amplifier design, using an active compensation circuitry. Results from statistical simulation in a 32 nm process show that the proposed active compensation is highly effective in restoring yield at a level comparable to that of sense amplifiers without significant process variations.
Keywords :
CMOS memory circuits; SRAM chips; amplifiers; embedded systems; nanolithography; spatial variables measurement; statistical analysis; active compensation circuitry; dopant density; embedded SRAM size; lithography related CD variations; nanoscale CMOS process variation; oxide thickness; parametric variations; sense amplifier based signaling technique; size 32 nm; statistical simulation; tolerant self-compensating sense amplifier design; Central Processing Unit; Circuits; Differential amplifiers; Fluctuations; Latches; Lithography; Random access memory; Robustness; Signal restoration; Voltage; SRAM; Sense Amplifier;
Conference_Titel :
VLSI, 2009. ISVLSI '09. IEEE Computer Society Annual Symposium on
Conference_Location :
Tampa, FL
Print_ISBN :
978-1-4244-4408-3
Electronic_ISBN :
978-0-7695-3684-2
DOI :
10.1109/ISVLSI.2009.50
