DocumentCode
2110877
Title
An evolutionary approach for data path synthesis
Author
Harmanani, Haidar M. ; Saliba, Rony
Author_Institution
Dept. of Comput. Eng. & Sci., Lebanese American Univ., Beirut, Lebanon
Volume
1
fYear
2000
fDate
2000
Firstpage
380
Abstract
This paper presents an evolutionary approach to solve the data path allocation problem in high-level synthesis. From a behavioral description and a set of constraints, the method generates a VHDL RTL data path and a controller structure with a minimal cost. The proposed method was implemented using the C language on a Linux workstation. We tested our method on various high-level synthesis benchmarks, all yielding good solutions in a short time. Designs were validated using Altera Max+Plus II
Keywords
C language; VLSI; controllers; digital integrated circuits; hardware description languages; high level synthesis; integrated circuit design; C language; Linux workstation; VHDL RTL data path; behavioral description; controller structure; data path allocation problem; data path synthesis; evolutionary approach; high-level synthesis; Circuit synthesis; Control system synthesis; Data engineering; Digital circuits; Flow graphs; Genetic algorithms; High level synthesis; Logic; Multiplexing; Network synthesis;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical and Computer Engineering, 2000 Canadian Conference on
Conference_Location
Halifax, NS
ISSN
0840-7789
Print_ISBN
0-7803-5957-7
Type
conf
DOI
10.1109/CCECE.2000.849734
Filename
849734
Link To Document