• DocumentCode
    2111119
  • Title

    Design of RSIC Test Sequence Based on ALFSR Generation Circuit

  • Author

    Hu, Zheng-wei ; Yang, Xing ; Xie, Zhi-yuan

  • Author_Institution
    Dept. of Electron. & Commun. Eng., North China Electr. Power Univ., Baoding
  • Volume
    1
  • fYear
    2008
  • fDate
    20-22 Dec. 2008
  • Firstpage
    317
  • Lastpage
    320
  • Abstract
    A design method for random single input change sequence based on ALFSR with primitive multinomial was proposed in this paper. ALFSR can not only generate sequence at any initial state and can be design easily without extra signals but generate RSIC sequence which has the maximal cycle. Code convert circuit was designed according to characters of ALFSR. Code convert circuit was composed of decoder and d flip-flop array. The function of decoder was selection for change bit of the RSIC sequence, and the function of d flip-flop array was iteration for RSIC sequence. The structure of d flip-flop array also makes seed vector setting easily. A module of this design method was implemented and verified with VHDL. The quality of this method was confirmed by these results. In this method, not only the circuit of random sequence is simple, but RSIC sequence has the maxim cycle, so the test rate was hang up.
  • Keywords
    convertors; flip-flops; hardware description languages; integrated circuit testing; sequential circuits; ALFSR generation circuit; RSIC test sequence; VHDL; code convert circuit; flip-flop array; primitive multinomial; random sequence circuit; ALFSR; RSIC; built in self test; generation of test vectors; pseudo-random testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Information Science and Engineering, 2008. ISISE '08. International Symposium on
  • Conference_Location
    Shanghai
  • Print_ISBN
    978-1-4244-2727-4
  • Type

    conf

  • DOI
    10.1109/ISISE.2008.302
  • Filename
    4732226