• DocumentCode
    2111411
  • Title

    An integrated CAD environment for design of testable VLSI circuits

  • Author

    Bhawmik, Sudipta ; Halder, Tapan K. ; Palchaudhuri, P.

  • Author_Institution
    Dept. of Comput. Sci. & Eng., Indian Inst. of Technol., Kharagpur, India
  • fYear
    1988
  • fDate
    7-9 June 1988
  • Firstpage
    1199
  • Abstract
    The authors describe how the VLSI design process can be integrated under the object-oriented programming (OOP) paradigm with special emphasis on the design for testability (DFT) discipline. Such a design environment built around OOP can reduce the design turn-around time considerably while ensuring efficient management of vast and diverse design information. The various methods associated with the DFT object are being developed and interfaced to the VLSI circuit object system hierarchy by utilizing the facilities provided by the COPE language.<>
  • Keywords
    VLSI; circuit CAD; integrated circuit technology; integrated circuit testing; COPE language; VLSI design process; design for testability; integrated CAD environment; object-oriented programming; testable VLSI circuits; Circuit testing; Computer science; Design automation; Design engineering; Design for testability; Environmental management; Integrated circuit technology; Object oriented programming; Process design; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1988., IEEE International Symposium on
  • Conference_Location
    Espoo, Finland
  • Type

    conf

  • DOI
    10.1109/ISCAS.1988.15142
  • Filename
    15142