Low noise radio frequency integrated circuits in 90 nm SOI CMOS up to 60 GHz

Author

Ellinger, F. ; Wickert, M. ; Eickhoff, R. ; Mayer, U. ; Hauptmann, S.

Author_Institution

Chair for Circuit Design & Network Theor., Dresden Univ. of Technol., Dresden

fYear

2008

fDate

13-14 May 2008

Firstpage

1

Lastpage

6

Abstract

In this paper we present the results of several key circuit blocks such as amplifiers, mixers and an oscillator in a 90 nm SOI CMOS technology. The circuits were optimized for low noise. Leading-edge results such as 3.8 dB noise figure (NF) up to 40 GHz and more than 8 dB gain up to 60 GHz for a wideband amplifier, a low loss of only 4.8 dB for a drain pumped transconductance mixer at 35 GHz consuming zero DC power, a third order intercept point (IIP3) of 15 dBm for a resistive mixer, and a phase noise of - 90 dBc/Hz at 1 MHz offset for a 60 GHz VCO (voltage controlled oscillator) are presented.

Keywords

CMOS integrated circuits; millimetre wave mixers; radiofrequency integrated circuits; silicon-on-insulator; voltage-controlled oscillators; wideband amplifiers; SOI CMOS technology; VCO; drain pumped transconductance mixer; frequency 60 GHz; low noise radio frequency integrated circuit; phase noise; resistive mixer; silicon-on-insulator; size 90 nm; technology; third order intercept point; voltage controlled oscillator; Broadband amplifiers; CMOS technology; Gain; Integrated circuit noise; Integrated circuit technology; Noise figure; Noise measurement; Radiofrequency amplifiers; Radiofrequency integrated circuits; Voltage-controlled oscillators;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwaves, Communications, Antennas and Electronic Systems, 2008. COMCAS 2008. IEEE International Conference on

Conference_Location

Tel-Aviv

Print_ISBN

978-1-4244-2097-1

Electronic_ISBN

978-1-4244-2098-8

Type

conf

DOI

10.1109/COMCAS.2008.4562811

Filename

4562811