• DocumentCode
    2112646
  • Title

    Impact of layout on the performance of photodiodes in 0.18µm CMOS SOI

  • Author

    Xuebei Yang ; Xuyang Lu ; Babakhani, A.

  • Author_Institution
    Electr. & Comput. Eng. Dept., Rice Univ., Houston, TX, USA
  • fYear
    2013
  • fDate
    8-12 Sept. 2013
  • Firstpage
    586
  • Lastpage
    587
  • Abstract
    The impact of layout on the responsivity and bandwidth of photodiodes is studied and summarized. The photodiodes are fabricated in a 0.18μm CMOS SOI process technology. The measurements are performed at wavelengths near 850nm.
  • Keywords
    CMOS integrated circuits; integrated circuit layout; integrated optoelectronics; photodiodes; silicon-on-insulator; CMOS SOI; layout impact; photodiode performance; silicon-on-insulator; size 0.18 mum; Bandwidth; CMOS integrated circuits; CMOS technology; Fingers; Layout; Metals; Photodiodes;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Photonics Conference (IPC), 2013 IEEE
  • Conference_Location
    Bellevue, WA
  • Print_ISBN
    978-1-4577-1506-8
  • Type

    conf

  • DOI
    10.1109/IPCon.2013.6656430
  • Filename
    6656430
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2112646