Title :
Use of the Chinese Abacus method for digital arithmetic functions
Author :
Maloberti, Franco ; Gang, Chen
Author_Institution :
Integrated Microsyst. Lab., Pavia Univ., Italy
fDate :
31 May-3 Jun 1998
Abstract :
This paper analyses the basic reasons that the Chinese Abacus is used to perform arithmetic functions as a popular and efficient technique. Proper electronic circuits, based on pass transistor and domino logic, are achieved to realize the same functions as the Chinese Abacus. Simulations with 0.5 μm CMOS technology show that a parallel 8 bit adder can run at 500 MHz. Moreover, a pipeline 8 bit adder and 8×8 bit multiplier can run at 1 GHz and 800 MHz respectively. Also, the compactness of the physical layout leads to a pretty small area for the circuits
Keywords :
CMOS logic circuits; adders; multiplying circuits; parallel architectures; pipeline arithmetic; 0.5 micron; 500 MHz to 1 GHz; 8 bit; CMOS technology; Chinese Abacus method; digital arithmetic functions; domino logic; multiplier; parallel adder; pass transistor logic; physical layout; pipeline adder; Adders; CMOS technology; Digital arithmetic; Educational institutions; Electronic circuits; Laboratories; Logic; Performance analysis; Pipelines; Switches;
Conference_Titel :
Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on
Conference_Location :
Monterey, CA
Print_ISBN :
0-7803-4455-3
DOI :
10.1109/ISCAS.1998.694446
