HART, a heterogeneous architecture for real-time prototyping, development and implementation of machine vision applications

Author

Goodenough, J. ; Shelley, A.J. ; Seed, N.L.

Author_Institution

Electron. Syst. Group, Sheffield Univ., UK

Volume

3

fYear

1994

fDate

13-16 Nov 1994

Firstpage

678

Abstract

We describe the motivations behind a generic image processing and computer vision platform that emphasises the integration of rapid algorithm development within a graphical front end and turn-key end use. A new modular, scaleable architecture is developed to address the problems of tractable implementation and evolved to match the requirements of dynamic scene analysis and understanding

Keywords

application specific integrated circuits; computer vision; development systems; digital signal processing chips; graphical user interfaces; image processing; reconfigurable architectures; software prototyping; ASICs; DSP chips; FIO architecture; HART; computer vision platform; dynamic scene analysis; generic image processing; graphical front end; heterogeneous architecture; machine vision applications; modular scaleable architecture; rapid algorithm development; real-time prototyping; turn-key end use; Animation; Application software; Computer vision; Field programmable gate arrays; Hardware; Image analysis; Image processing; Machine vision; Pipelines; Prototypes;

fLanguage

English

Publisher

ieee

Conference_Titel

Image Processing, 1994. Proceedings. ICIP-94., IEEE International Conference

Conference_Location

Austin, TX

Print_ISBN

0-8186-6952-7

Type

conf

DOI

10.1109/ICIP.1994.413803

Filename

413803