DocumentCode :
2114253
Title :
Efficient algorithms for binary logarithmic conversion and addition
Author :
Wan, Yi ; Wey, Chin-Long
Author_Institution :
Dept. of Electr. Eng., Michigan State Univ., East Lansing, MI, USA
Volume :
5
fYear :
1998
fDate :
31 May-3 Jun 1998
Firstpage :
233
Abstract :
Logarithm number system is an attractive alternative to the conventional number systems when data need to be manipulated at very high rate over a wide data range. However, the major problem is deriving logarithm and anti-logarithm quickly and accurately enough to allow conversions to and from the conventional number representations. In this paper, efficient algorithms that convert the conventional number representation to binary logarithm representation are proposed. The algorithms adopt a factorization approach to reduce the look-up table size and a nonlinear approximation method to reduce the computational complexity. Simulation results on IEEE single precision (24 bits) conversion are presented, and the conversion requires only one ROM table with 213×26 bits, one with 213×14 bits, and one with 213×5 bits, or a total of 360 kbits. The algorithm can also be adopted for binary logarithmic addition
Keywords :
binary sequences; computational complexity; digital arithmetic; table lookup; 24 bit; ROM table; anti-logarithm; binary logarithmic addition; binary logarithmic conversion; computational complexity; factorization approach; logarithm number system; look-up table size; nonlinear approximation method; Approximation algorithms; Approximation error; Approximation methods; Computational complexity; Computational modeling; Digital arithmetic; Digital filters; Linear approximation; Read only memory; Table lookup;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on
Conference_Location :
Monterey, CA
Print_ISBN :
0-7803-4455-3
Type :
conf
DOI :
10.1109/ISCAS.1998.694452
Filename :
694452
Link To Document :
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