DocumentCode
2114619
Title
Post-compaction register assignment in a retargetable compiler
Author
Sweany, Philip ; Beaty, Steven
Author_Institution
Dept. of Comput. Sci., Colorado State Univ., Fort Collins, CO, USA
fYear
1990
fDate
27-29 Nov 1990
Firstpage
107
Lastpage
116
Abstract
The authors discuss graph-coloring register assignment in a retargetable compiler for long-instruction-word architectures. Of specific concern is when, during the compilation process, should register assignment be performed. The authors conclude that, for best results, register assignment should follow compaction. They discuss methods of circumventing the implementation problems inherent in such late register assignment
Keywords
parallel architectures; program compilers; graph-coloring register assignment; implementation problems; long-instruction-word architectures; post-compaction register assignment; retargetable compiler; Compaction; Computer science; Concurrent computing; Delay; High level languages; Mechanical engineering; Program processors; Registers; Rockets; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Microprogramming and Microarchitecture. Micro 23. Proceedings of the 23rd Annual Workshop and Symposium., Workshop on
Conference_Location
Orlando, FL
Print_ISBN
0-8186-2124-9
Type
conf
DOI
10.1109/MICRO.1990.151432
Filename
151432
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