DocumentCode :
2115011
Title :
1 Gb stacked solution of multilevel NOR flash memory packaged in a LFBGA 8 mm by 10 mm by 1.4 mm of thickness
Author :
Dellutri, M. ; Pulici, P. ; Guarnaccia, D. ; Stoppino, P. ; Vanalli, G. ; Lessio, T. ; Vassallo, F. ; Stefano, R. Di ; Labriola, G. ; Tenerello, A. ; Iacono, F. Lo ; Campardo, G.
Author_Institution :
STMicroelectron., Milano
fYear :
2006
fDate :
24-26 April 2006
Firstpage :
1
Lastpage :
5
Abstract :
The evolution of electronic world is running toward more and more complex devices even looking for a reduction of the overall system dimensions. This improvement is particularly evident in the wireless applications where portable devices are becoming the key products. Many different applications have been inserted in the last years to satisfy all the increasing final user requirements, without affecting the final device dimensions. This important goal was possible due to many technical achievements in term of integration, the stacked package solutions being the most relevant among them. This assembly technology allows putting more dice one upon the other in a unique package so exploiting its z-dimension. This work aims to describe a multi-memory stacked device of 1 Gb size of the NOR flash memory composed by a four 256Mb dice stacked structure. This solution allows increasing the memory size maintaining the electrical performances of the multilevel NOR flash i.e. speed class. The structure is composed by seven dice: four active and three dummy interposers to create the physical space for the wires bonding from die pads to package substrate (Titus et al., 2004). The package is a LFBGA (low fine pitch ball grid array) 8 mm by 10 mm by 1.4 mm with 88 balls (0.8 mm pitch). An embedded circuitry in the die implements the logic to allow the system to be managed as a monolithic 1 Gb. Moreover, a description of the electrical analysis is reported in order to highlight the electromagnetic interferences between the different dice and the signal integrity of the whole system. Some samples of the device have been assembled in a package without molding in order to make measurements even on the pad of the devices and other critical nodes internal into the package
Keywords :
NOR circuits; assembling; ball grid arrays; electromagnetic interference; fine-pitch technology; flash memories; integrated circuit packaging; integrated memory circuits; lead bonding; 1E9 bit; LFBGA; NOR flash memory packaged; assembly technology; dice stacked structure; die pads; electrical analysis; electromagnetic interferences; embedded circuitry; low fine pitch ball grid array; multilevel flash memory packaged; multimemory stacked device; package substrate; portable devices; signal integrity; stacked package solutions; stacked solution; wireless applications; wires bonding; z-dimension; Assembly; Bonding; Electromagnetic analysis; Electromagnetic interference; Electronics packaging; Flash memory; Logic circuits; Logic devices; Signal analysis; Wires;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Thermal, Mechanical and Multiphysics Simulation and Experiments in Micro-Electronics and Micro-Systems, 2006. EuroSime 2006. 7th International Conference on
Conference_Location :
Como
Print_ISBN :
1-4244-0275-1
Type :
conf
DOI :
10.1109/ESIME.2006.1643997
Filename :
1643997
Link To Document :
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