Title :
A novel full differential double sampling circuit for ADC
Author :
Hu, Rongbin ; Tang, Jie
Author_Institution :
Sichuan Inst. of Solid State Circuits, Chongqing, China
Abstract :
A novel full differential double sampling circuit is presented in the paper. The traditional full differential single sampling circuit is compared with the proposed full differential double sampling one to show that the latter has more efficiency and higher speed The proposed full differential double sampling circuit is designed in TSMC 0.18μm CMOS process technology. The simulation results show that the SFDR of the proposed full differential double sampling circuit is 81.36dB at 200MS/s. Further simulations show that the proposed full differential double sampling circuit has twice better performance than the traditional one.
Keywords :
CMOS integrated circuits; analogue-digital conversion; ADC; TSMC 0.18μm CMOS process technology; novel full differential double sampling circuit; size 0.18 mum; CMOS integrated circuits; CMOS process; Capacitors; Clocks; Feedback circuits; MOS devices; Solid state circuits; ADC; S/H; common feedback circuits;
Conference_Titel :
Consumer Electronics, Communications and Networks (CECNet), 2012 2nd International Conference on
Conference_Location :
Yichang
Print_ISBN :
978-1-4577-1414-6
DOI :
10.1109/CECNet.2012.6201591
