DocumentCode :
2117050
Title :
Tree grouping per HDLA-models
Author :
Sebe, Niculae
Author_Institution :
Politech. Univ. of Bucharest, Romania
Volume :
2
fYear :
1996
fDate :
9-12 Oct 1996
Firstpage :
323
Abstract :
This article presents a data-structure for the representation of behavioral and structural time-continuous-systems, with an emphasis on VLSI integrated circuits, which allows the synthesis of VHDL-A-like code
Keywords :
VLSI; analogue integrated circuits; continuous time systems; hardware description languages; tree data structures; trees (mathematics); HDLA-models; VHDL-A-like code; VLSI; behavioral time-continuous-systems; data-structure; structural time-continuous-systems; tree grouping; Algorithm design and analysis; Difference equations; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Semiconductor Conference, 1996., International
Conference_Location :
Sinaia
Print_ISBN :
0-7803-3223-7
Type :
conf
DOI :
10.1109/SMICND.1996.557381
Filename :
557381
Link To Document :
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