DocumentCode
2120362
Title
Analog circuit design in scaled CMOS technology
Author
Sansen, W.
Author_Institution
Katholieke Univ., Leuven, Belgium
fYear
1996
fDate
13-15 June 1996
Firstpage
8
Lastpage
11
Abstract
Scaled CMOS technology gives rise to submicron devices. In such devices short-channel effects lead to shifts in threshold voltage, increased mismatch and noise. The velocity saturation limits the obtainable transconductance and hence also the high speed performance. Lower supply voltages require the operational amplifier building block to operate rail-to-rail. In delta-sigma converters this leads to very-low-power converters. Considerable attention goes to circuit design for telecommunication applications, in which the inductor is making a comeback. The ultimate challenge of analog design however is the cointegration with digital blocks, causing coupling noise and requiring sophisticated tools.
Keywords
CMOS analogue integrated circuits; VLSI; integrated circuit design; integrated circuit noise; operational amplifiers; sigma-delta modulation; analog circuit design; circuit design; coupling noise; delta-sigma converters; high speed performance; operational amplifier building block; scaled CMOS technology; short-channel effects; submicron devices; supply voltages; threshold voltage; transconductance; velocity saturation; Analog circuits; CMOS analog integrated circuits; CMOS technology; Circuit noise; Circuit synthesis; Operational amplifiers; Rail to rail amplifiers; Rail to rail operation; Threshold voltage; Transconductance;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Circuits, 1996. Digest of Technical Papers., 1996 Symposium on
Conference_Location
Honolulu, HI, USA
Print_ISBN
0-7803-3339-X
Type
conf
DOI
10.1109/VLSIC.1996.507696
Filename
507696
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