Comparison of two methods for addressing DC component in phase-locked loop (PLL) systems

This paper studies two methods of addressing the DC component in phase-locked loop (PLL) systems. The DC component that may be actually present or may be generated by sensors, analog/digital converters or other signal conditioning systems, is a critical matter due to the fact that it causes low-frequency oscillations in the operation of PLL systems. Two methods are discussed in this paper where one of them adds a new loop inside the PLL to remove the DC and the other one uses a pre-filter to block the DC and then compensates for the filter´s distortions at the output. The methods are compared from several points of view including: signal estimation, steady state performance, transient response, and computational complexity. The paper concludes that the first method offers a solution that is overall more desirable than the second one.