DocumentCode
2121646
Title
A provably correct, non-deadlocking parallel event simulation algorithm
Author
Yu, Meng-Lin ; Ghosh, Sumit ; DeBenedictis, Erik
Author_Institution
AT&T Bell Labs., Holmdel, NJ, USA
fYear
1991
fDate
1-5 Apr 1991
Firstpage
100
Lastpage
111
Abstract
This paper first summarizes and then presents a formal proof to a new conservative deadlock-free algorithm, YADDES, for asynchronous discrete event simulation. The proof not only makes the algorithm complete but helps better understand the seemingly complicated algorithm. YADDES constructs a special acyclic data-flow network from the network of simulation models to keep track of the run time data dependencies, which permits a model to be correctly executed as far ahead in time as possible. The data-flow network also uses the asynchronous parallel discrete event driven technique and runs concurrently with the network of simulation models. This paper also reports a preliminary implementation of the algorithm and discusses the algorithm´s limitations
Keywords
discrete event simulation; acyclic data-flow network; asynchronous discrete event simulation; nondeadlocking parallel event simulation algorithm; run time data dependencies; simulation models; Centralized control; Circuit simulation; Communication channels; Data structures; Digital circuits; Discrete event simulation; Scheduling algorithm; System recovery; Telephony; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Simulation Symposium, 1991., Proceedings of the 24th Annual
Conference_Location
New Orleans, LA
Print_ISBN
0-8186-2169-9
Type
conf
DOI
10.1109/SIMSYM.1991.151493
Filename
151493
Link To Document