Excess gate leakage at low voltage in InP-based HEMTs

Author

Maher, H. ; Scavennec, A. ; Dccobert, J. ; Post, G. ; Zerounian, N. ; Cavassilas, N. ; Aniel, F.

Author_Institution

OPTO+, Marcoussis, France

fYear

2000

fDate

2000

Firstpage

83

Lastpage

86

Abstract

Excess gate leakage is usually observed in InP-based HEMTs as a hump in the i_g-V_g characteristics, appearing at low V_ds. This excess current has been ascribed to impact ionization in the InGaAs channel. A second hump is also observed at higher V_ds. Analysis of the features of the two humps, supported by electroluminescence observations, points to a more complex behaviour, with real space transfer through the buffer layer to the AlInAs/InP interface playing a major role in the low V_ds hump

Keywords

III-V semiconductors; electroluminescence; high electron mobility transistors; impact ionisation; indium compounds; AlInAs-InGaAs; InP; InP HEMT; electroluminescence; excess gate leakage current; impact ionization; real space transfer; substrate/buffer layer interface; Buffer layers; Electroluminescence; Electrons; Gate leakage; HEMTs; Impact ionization; Indium gallium arsenide; Indium phosphide; Low voltage; MODFETs;

fLanguage

English

Publisher

ieee

Conference_Titel

Indium Phosphide and Related Materials, 2000. Conference Proceedings. 2000 International Conference on

Conference_Location

Williamsburg, VA

ISSN

1092-8669

Print_ISBN

0-7803-6320-5

Type

conf

DOI

10.1109/ICIPRM.2000.850237

Filename

850237