• DocumentCode
    2122845
  • Title

    All digital wideband polar transmitter

  • Author

    Zhang, Hucheng ; Chi, Baoyong

  • Author_Institution
    Inst. of Microelectron., Tsinghua Univ., Beijing, China
  • fYear
    2012
  • fDate
    21-23 April 2012
  • Firstpage
    1618
  • Lastpage
    1621
  • Abstract
    A novel architecture of all-digital polar transmitters is presented, which replaces high dynamic range analog circuits with high speed digital circuits and thus offers lower cost and higher performance compared to those of conventional analog transmitters. The proposed transmitter is mainly composed of an all digital PLL for phase modulation, and 1bit low pass ΣΔ modulator for amplitude modulation and Digital Power Amplifier arrays. The design is modeled and analyzed in MATLAB and realized based on TSMC 65nm CMOS process.
  • Keywords
    CMOS integrated circuits; amplitude modulation; digital phase locked loops; phase modulation; sigma-delta modulation; MATLAB; TSMC CMOS process; all digital PLL; all digital wideband polar transmitter; amplitude modulation; conventional analog transmitters; digital power amplifier arrays; high speed digital circuits; low pass ΣΔ modulator; phase modulation; size 65 nm; word length 1 bit; Decision support systems; ΣΔ modulator; ADPLL; All digital; DPA; polar transmitter;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Consumer Electronics, Communications and Networks (CECNet), 2012 2nd International Conference on
  • Conference_Location
    Yichang
  • Print_ISBN
    978-1-4577-1414-6
  • Type

    conf

  • DOI
    10.1109/CECNet.2012.6201841
  • Filename
    6201841