Title :
Effectiveness of a variable sampling time strategy for delay fault diagnosis
Author :
Dumas, D. ; Girard, P. ; Landrault, C. ; Pravossoudovitch, S.
Author_Institution :
Lab. d´´Inf. de Robotique et de Microelectron., Montpellier Univ., France
fDate :
28 Feb-3 Mar 1994
Abstract :
Delay fault testing has been an active research topic in the last ten years. Recently proposed methods try to move the sampling time of the circuit outputs during testing to produce better fault coverages than that obtained by using a fixed observation time method. In the same way, the authors propose to use such a testing scheme to improve delay fault diagnosis when compared to methods based on fixed output sampling times. The timing analysis which gives the output observation times applied during the test is first described in this paper. Next, the authors present the diagnosis method they implemented with the new testing scheme. Finally, results showing the effectiveness of a variable sampling time strategy for delay fault diagnosis are given
Keywords :
integrated circuit testing; logic testing; IC testing; benchmark circuits; delay fault diagnosis; delay fault testing; fault coverages; logic testing; output observation times; timing analysis; variable sampling time strategy; Circuit faults; Circuit testing; Delay effects; Electrical fault detection; Fault detection; Fault diagnosis; Logic testing; Robustness; Sampling methods; Timing;
Conference_Titel :
European Design and Test Conference, 1994. EDAC, The European Conference on Design Automation. ETC European Test Conference. EUROASIC, The European Event in ASIC Design, Proceedings.
Conference_Location :
Paris
Print_ISBN :
0-8186-5410-4
DOI :
10.1109/EDTC.1994.326826