Title :
Design of a digital neural chip: application to optical character recognition by neural network
Author :
Jacquet, D. ; Saucier, G.
Author_Institution :
Inst. Nat. Polytech. de Grenoble, France
fDate :
28 Feb-3 Mar 1994
Abstract :
Presents the design of a dedicated chip achieving the recognition phase of layered neural networks. General back-propagation (GBP) and learning vector quantization (LVQ) neurons can be emulated on this chip (called the OCR-chip). It consists of five processors: four neuron processors interconnected in a ring, each are computing several states of different GBP neurons, and a LVQ processor used to compute the states of the LVQ neurons. Connections between GBP neurons folded on the same processor are implemented in each processor by using an address generator based on modulus m counters. An optical character recognition (OCR) neural network (840 neurons in 4 layers and 800 LVQ neurons) is used as demonstrator
Keywords :
CMOS integrated circuits; backpropagation; character recognition equipment; digital integrated circuits; neural chips; optical character recognition; vector quantisation; GBP neuron interconnections; LVQ neurons; OCR-chip; adders; address generator; dedicated chip; digital neural chip design; general back-propagation neurons; layered neural networks; learning vector quantization neurons; neural network; neuron processors; optical character recognition; optical character recognition neural network; recognition phase; ring interconnected processors; Counting circuits; Neural network hardware; Neural networks; Neurons; Optical character recognition software; Optical computing; Optical design; Optical fiber networks; Optical interconnections; Vector quantization;
Conference_Titel :
European Design and Test Conference, 1994. EDAC, The European Conference on Design Automation. ETC European Test Conference. EUROASIC, The European Event in ASIC Design, Proceedings.
Conference_Location :
Paris
Print_ISBN :
0-8186-5410-4
DOI :
10.1109/EDTC.1994.326868