A power-optimized CMOS baseband channel filter and ADC for cordless applications

Author

Cho, T.B. ; Chien, G. ; Brianti, F. ; Gray, P.R.

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA

fYear

1996

fDate

13-15 June 1996

Firstpage

64

Lastpage

65

Abstract

A 3.3 V continuous-time anti-aliasing filter, 8th-order switched-capacitor channel filter and 10-bit ADC implemented in 0.6 micron CMOS for baseband channel filtering in direct conversion cordless phone receivers realizes an overall gain of 50 dB with 42 dB of gain control range. Dynamic range of the combined filter section is 87 dB, and the maximum SNDR of ADC is 54 dB at 40 MS/s. Total power dissipation of 48 mW for filters and ADC is achieved at 3.3 volts through optimum capacitor scaling in filter and pipeline ADC implementation.

Keywords

CMOS analogue integrated circuits; analogue-digital conversion; continuous time filters; cordless telephone systems; land mobile radio; low-pass filters; radio receivers; switched capacitor filters; 0.6 micron; 10 bit; 3.3 V; 48 mW; 50 dB; 8th-order filter; CMOS baseband channel filter; DECT; SC channel filter; anti-aliasing filter; continuous-time filter; cordless applications; direct conversion cordless phone receivers; monolithic ADC; pipeline ADC implementation; power-optimized channel filter; switched-capacitor channel filter; Baseband; Capacitors; Dynamic range; Filtering; Filters; Gain control; Pipelines; Power dissipation;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Circuits, 1996. Digest of Technical Papers., 1996 Symposium on

Conference_Location

Honolulu, HI, USA

Print_ISBN

0-7803-3339-X

Type

conf

DOI

10.1109/VLSIC.1996.507718

Filename

507718