• DocumentCode
    2125613
  • Title

    Application of simple genetic algorithms to sequential circuit test generation

  • Author

    Rudnick, Elizabeth M. ; Holm, John G. ; Saab, Daniel G. ; Patel, Janak H.

  • Author_Institution
    Center for Reliable & High Performance Comput., Illinois Univ., Urbana, IL, USA
  • fYear
    1994
  • fDate
    28 Feb-3 Mar 1994
  • Firstpage
    40
  • Lastpage
    45
  • Abstract
    In this work we investigate the effectiveness of genetic algorithms (GAs) in the test generation process. We use simple GAs to generate populations of candidate test vectors and to select the best vector to apply in each time frame. A sequential circuit fault simulator is used to evaluate the fitness of each candidate vector, allowing the test generator to be used for both combinational and sequential circuits. We experimented with various GA parameters, namely population size, number of generations, mutation rate, and selection and crossover schemes. For the ISCAS85 combinational benchmark circuits, 100% of testable faults were detected in six of the ten circuits used, and very compact test sets were generated. Good results were obtained for many of the ISCAS89 sequential benchmark circuits, and execution times were significantly lower than in a deterministic test generator in most cases
  • Keywords
    combinatorial circuits; genetic algorithms; logic testing; sequential circuits; candidate test vectors; combinational circuits; crossover schemes; genetic algorithms; mutation rate; population size; selection schemes; sequential circuit fault simulator; sequential circuit test generation; Benchmark testing; Circuit faults; Circuit simulation; Circuit testing; Electrical fault detection; Fault detection; Genetic algorithms; Genetic mutations; Sequential analysis; Sequential circuits;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    European Design and Test Conference, 1994. EDAC, The European Conference on Design Automation. ETC European Test Conference. EUROASIC, The European Event in ASIC Design, Proceedings.
  • Conference_Location
    Paris
  • Print_ISBN
    0-8186-5410-4
  • Type

    conf

  • DOI
    10.1109/EDTC.1994.326901
  • Filename
    326901