A robust and sensitive silicon tactile imager with individually formed SU-8 protective layers on piezoresistor pixels

In this paper, a new structure of silicon tactile imager with SU-8 protective layer is presented. The protective layer is formed on the surface of integrated piezoresistor array to prevent direct contact of the sensor surface to the object. The protective layer is formed individually on each pixel circuit to prevent degradation of the spatial resolution. This tactile imager is fabricated by an established post-CMOS process without any process damage to the MOS integrated circuits. The independent protective layer is simply formed by a single step of SU-8 lithography on the pixel array. The experimental device fabricated in this study integrates 5 × 5 array of piezoresistors on a silicon 10μm-thick diaphragm fabricated by an SOI active layer. The scale of integration and the pitch of the piezoresistor pixel array (800μm) are determined by the feature size of circuit fabrication technology and the minimum resolution of the SU-8 lithography process. In the fabricated device, both high sensitivity and spatial resolution are obtained by the new structure with high robustness.