A data recovery circuit for burst signal using 440 MHz CMOS direct phase controlled VCO

Author

Yoshida, A. ; Taya, T. ; Yamaoka, N. ; Matsumoto, S. ; Yokoyama, T.

Author_Institution

Integrated Designing Div., Oki Electr. Ind. Co. Ltd., Tokyo, Japan

fYear

1996

fDate

13-15 June 1996

Firstpage

120

Lastpage

121

Abstract

A clock and data recovery circuit is a key element in communication systems for realizing high speed signal transfers. In passive optical transmission systems, a data recovery circuit for burst data is indispensable. A burst-mode clock and data recovery circuit using gated VCOs has been reported. We have proposed data recovery circuits for a continuous bit stream using the direct phase controlled VCO (DPC-VC0) where the oscillation phase of the VCO is directly controlled by the trigger signal extracted from the input data. This paper proposes a data recovery circuit for burst data using the DPC-VCO in a 0.5um CMOS process.

Keywords

CMOS integrated circuits; VLSI; integrated circuit design; optical communication equipment; voltage-controlled oscillators; 0.5 micron; 440 MHz; CMOS; burst signal; continuous bit stream; data recovery circuit; direct phase controlled VCO; high speed signal transfers; oscillation phase; passive optical transmission systems; trigger signal; CMOS process; Circuits; Clocks; Communication system control; Data mining; High speed optical techniques; Voltage-controlled oscillators;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Circuits, 1996. Digest of Technical Papers., 1996 Symposium on

Conference_Location

Honolulu, HI, USA

Print_ISBN

0-7803-3339-X

Type

conf

DOI

10.1109/VLSIC.1996.507738

Filename

507738